Biases are found in the biasgenSettings folder. Use tmpdiff128.xml for the original bare boards and one of the DVS128*.xml for the new DVS128 sensors.
The DVS128 firmware (CypressFX2 software and CPLD configuration) can be updated easily (although firmware updates always have some element of risk).
The change log shows the firmware revision information.
You can check which firmware version you have and then optionally update. Do this by using the USB menu (with the DVS128 plugged in):
The DVS128 firmware changelog records changes to DVS128 firmware. Updating firmware is always risky and if something goes wrong you may need to return the camera for a new EEPROM (for which we will charge.) If you elect to update, you should see a progress bar followed by success:
The lens mount shown above for the Tmpdiff128 camera and the integrated lens mount in the DVS128 camera is designed for CS mount lenses. If you have a C-mount lens, you will need to get an extending adapter that moves the lens further from the chip. The chip requires lens designed for 1/2 inch imagers (die size is 6.0x6.3mm and active area is 5.12×5.12mm. In any case, the field of view is larger than that of common 1/3 inch imagers for which many lens are sold.
The field of view (FOV) depends on the focal length L of the lens and the size W of the pixel array. The angular FOV (AFOV) is given by
The linear FOV (LFOV) at a distance D from the lens is given simply by similar triangles
The pixel array measures W=128 pixels x 40 um/pixel=5.12 mm.
The following table shows the horizontal and vertical field of view in degrees and its size at various distances for different common focal lengths.
|Computations of Tmpdiff128/DVS128 Field of View|
| pixel array dimension, x or y |
| lens focal length |
horizontal or vertical
| AFOV diagonal|
|distance 10 cm||distance 30 cm||distance 100 cm|
Electrical synchronization capabilities depend on the camera version.
The DVS128 cameras can be precisely synchronized so that simultaneous events from two cameras will receive exactly the same timestamps. The camera have the capability that one camera can be the master timestamp source which clocks the the other's timestamp counter.
For synchronization, cameras with a firmware version number >= 11 should be used, older firmware versions are not synchronized properly if the USB load is high. To enable this functionality, the cameras must be connected so that the OUT of the master is connected to the IN of the slave(s). If the cameras are connected to the same computer, the ground pins do not have to be connected (to avoid possible ground loops). If the cameras are connected to different computers, the ground pins should be connected as shown below.
Starting from firmware version 11, the timestamp master camera has to be selected in software. In the jAER software, for the timestamp master (where the OUT is connected) the checkbox 'Timestamp master / enable sync event output' in the DVS128-menu has to be checked, for the slave(s), this checkbox has to be unchecked.
The master camera keeps its bottom LED lit, while the slaves extinguish theirs.
To synchronize the cameras after plugging them in, press '0' in the AEViewer window of the timestamp master to reset the timestamps of all the cameras.
It is possible to reset the timestamps to zero by an external electrical signal. The two pins from the back of the board shown above, when shorted, will reset the 16 bit timestamp counter on the board. Actually one of the pins is board ground, taking the other pin to ground will zero the timestamps. This reset also results in sending a USB message to the host on endpoint 1 USB channel that will reset the 32 bit timestamp unwrap counter to zero on the host. As long as the pin is low these messages will be sent, so it is better to use a low going pulse with a small duty cycle if possible.
From the Tmpdiff128 board it is not possible to send a special event address on receipt of an external sync signal.
A capability of DVS128 firmware revision 7+ is the ability to inject synthetic events into the event stream on falling edges detected on the IN pin. In this mode, the function of the IN pin is modified so that instead of clocking the internal timestamp counter, it now injects a special event with bit 15 set on every falling edge of the IN pin.
These sync events are generated on each falling edge at the IN pin.
The IN pin is not 5V tolerant. High must not exceed 3.3V.
To enable this mode, first check your camera firmware version. Then, while the DVS128 is plugged in, use the DVS128 menu to select the sync event enabled, as shown in the screen shot below:
Falling edges of the IN pin should result in logging these special events:
log.info("sync event at timestamp="+timestamps[eventCounter]); }
By choosing the AEChip Tmpdiff128StereoPair as shown below, you can plug in two DVS128 by separate USB interfaces and they will be treated as a stereo pair. Recording, playback, control of biases, common filtering, etc are applied to the resulting stereo stream. (This class name may change in the future.)
The events are internally represented as objects of type BinocularEvent. Look for usages of this class for examples.
The rendering of stereo recordings uses the convention red=Right, green=Left. (remember “red right”). However this choice is arbitrary. The assignment of left / right is made by lexicographic comparison of the serial number strings. (This assignment is likely to be changed without notice.)
Internally, the raw stereo addresses presently use bit 15 to mark the right eye, i.e. 1=right, 0=left. However this assignment is also likely to change without notice.
The hardware interface class for the stereo pair allows the optional ordering of incoming events so that time increases monotonically. This sorting has significant cost in computation and latency. See usages of the class StereoHardwareInterface for examples of the use of the setIgnoreTimestampNonmonotincity() flag. This option is controlled by the File/Check for non-monotonic time in input streams option, as shown below:
The default biases DVS128Slow.xml or Tmpdiff128.xml (in the Biases are found in the biasgenSettings folder.) are suitable for many situations. These settings can be saved to a location of your choice and then opened from the Biasgen File/Load settings… dialog. After that the settings will be stored as your default preferences. Other settings are stored in files starting with the device class name in jAER.
You can open the Biasgen window from the button at the bottom of the JAERViewer window or from the View menu.
The most recent loaded or saved bias settings are persistent–the next time you start the jAERViewer application you will get the most recent saved bias values. If you wish to export these more permanently you can do so with the File/Save settings… dialog. If you change biases without saving, then your changes will be lost.
The Biasgen control panel support unlimited Undo and Redo, including reversion to saved settings, so you can feel safe about playing with the settings.
The View menu allows disabling unneeded views of the bias values, e.g. the bit values.
The biases control panel has two tabs: Basic controls and Expert controls.
The Basic controls tab looks like this:
Using these controls you can vary the biases around the nominal values loaded from the settings file (e.g. DVS128Fast.xml).
The Expert controls tab looks something like this:
These controls directly vary bias currents.
For dark conditions, it may be helpful to reduce Pr and/or foll to slow the front end photoreceptor to prevent parasitic oscillations.
For high speed operation, it may be helpful to increase Pr, foll, and refr. Hover over the bias name to get a tooltip hint as to its functionality.
Sliding diffOn to left towards diff decreases ON event threshold.
Sliding diffOFF to right towards diff decreases OFF event threshold.
See the jAER project wiki for more information, in particular this page about loading logged AE data into matlab.
|Functionality||Asynchronous temporal contrast|
|Pixel size um (lambda)||40×40 (200×200)|
|Fill factor (%)||9% (PD area 151μm2)|
|Fabrication process||4M 2P 0.35um standard CMOS|
|Pixel complexity||26 transistors (14 analog), 3 capacitors|
|Array size||128×128, 16k pixels|
|Die size mm2||6.0 x 6.3|
|Chip interface||15-bit word-parallel AER
active low Req and Ack 4-phase handshake
|Computer interface||USB 2.0, Windows XP driver
Java API & Matlab output file format
|Power consumption||Chip: 23mW @ 3.3V
USB System: approx. 70mA
2 lux to > 100 klux scene illumination with f/1.2 lens with normal contrast objects
Moonlight (<0.1 lux) with high contrast scene
|Photodiode dark current at room temperature||4fA (~10nA/cm2)
|Response latency||15μs @ 1 klux chip illumination|
|Max events/sec||~1M events/sec|
|Pixel matching||2.1% contrast
(The event threshold 1-sigma mismatch is 2.1% contrast)
|Optics||Standard CS-mount lenses
Other custom mounts available
|Board dimensions||Width: 49mm
Depth (OD from front to back of boards): 14mm
PGA 101 package: 33.6mm square
Close up photos of the DVS128 sensor are shown below. The blinking HB (heartbeat) LED shows that the cameras controller is running. The M (master) LED is ON as long as the DVS128 is time-stamp master, it turns off, if the DVS128 is clocked externally. The synchronization pin usage is explained above.